Power ISA(TM) Version 3.1 has introduced a new family of matrix mathinstructions, collectively known as the Matrix-Multiply Assist (MMA) facility . These instructions have led to a power- and area-efficient implementation of ahigh throughput math engine in the future POWER10 processor . Performance percore is 4 times better, at constant frequency, than the previous generationPOWER9 processor . We also advocate the use of compiler built-ins as the preferred way of leveraging these instructions .

Author(s) : José E. Moreira, Kit Barton, Steven Battle, Peter Bergner, Ramon Bertran, Puneeth Bhat, Pedro Caldeira, David Edelsohn, Gordon Fossum, Brad Frey, Nemanja Ivanovic, Chip Kerchner, Vincent Lim, Shakti Kapoor, Tulio Machado Filho, Silvia Melitta Mueller, Brett Olsson, Satish Sadasivam, Baptiste Saleil, Bill Schmidt, Rajalakshmi Srinivasaraghavan, Shricharan Srivatsan, Brian Thompto, Andreas Wagner, Nelson Wu

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Keywords : power - matrix - math - facility - isa -

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