The visual frontend is a major performance and energy consumption bottleneck in autonomous machine applications . Compared to Nvidia TX1 and Intel i7, ourFPGA-based implementation achieves 5.6x and 3.4x speedup, as well as 3.0x and 34.6X power reduction, respectively. Compared to the Nvidia TX-1, Intel i.7, the implementation achieves 3.5x power reduction . The FPGAs are integrated in our design. We present hardware synchronization, frame-multiplexing, and parallelization techniques, which are integrated .

Author(s) : Zishen Wan, Yuyang Zhang, Arijit Raychowdhury, Bo Yu, Yanjun Zhang, Shaoshan Liu

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Keywords : x - compared - reduction - power - visual -

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